Wednesday Mar 3, 2021, 17:40 - 17:50 CET
CORE-V: Industrial Grade, Open Source RISC-V Cores
Exhibitor’s Forum 1
Speaker: Rick O’Connor, OpenHW Group
Thursday Mar 4, 2021, 11:00 - 11:30 CET
RISC-V with OpenHW Roundtable
Roundtable with OpenHW Group
Friday Mar 5, 2021, 11:30 - 12:00 CET
Session on System-on-Chip: Core Integration & Tools
Leveraging RISC-V Technology for Industry Use
Speakers: Robert Oshana, Vice President, NXP & Rick O’Connor, OpenHW Group
Friday Mar 5, 2021, 12:30 - 12:45 CET
Session on System-on-Chip: Core Integration & Tools
Discussion/Q&A
Farhad Mafie with Rob Oshana & Rick O’Connor
Friday Mar 5, 2021, 14:20 - 14:40 CET
Exhibitor Forum 2
CORE-V: Industrial Grade, Open-Source RISC-V Cores
The CORE-V family is an OpenHW Group project to develop, deploy, execute pre-silicon functional verification and SoC based evaluation kits of the CORE-V family of open-source RISC-V cores. Written in SystemVerilog, the CORE-V open-source IP matches the quality of IP offered by established commercial providers and is verified with state-of-the-art, auditable flows. With Rick O’Connor, OpenHW Group.
Registration for Embedded World: https://www.messe-ticket.de/Nuernberg/embeddedworld2021/
For more information, visit the event website https://www.embedded-world.de/en/programme