2024 Siemens EDA Forum Shanghai
The 2024 Siemens EDA Forum will be held in Shanghai on 19 September 2024. OpenHW will showcase our latest open source, industrial grade RISC-V Cores and how they are working flawlessness with Siemens EDA Tools.
Formal Verification
Verification Futures Conference 2024 Austin - Accelerate your adoption of RISC-V with CORE-V-VERIF
Mike Thompson will speak about how to Accelerate your adoption of RISC-V with CORE-V-VERIF.
CORE-V-VERIF is an open source project supported by the OpenHW Group. Its goal is to provide an open-source environment and workflow that can be deployed into any RISC-V processor core. Since December 2020, OpenHW Group members have successfully used CORE-V-VERIF for end-to-end verification of more than six RISC-V cores.
OpenHWTV S1E6 webinar recording on Formal Verification for the CORE-V CVE4 now available on-demand
Watch OpenHW Group's latest webinar, the final episode of 2020, providing a Knowledge Boost into Formal Verification for the CORE-V CVE4. Held on November 20, the webinar episode, is available to watch on-demand.
Register for OpenHW TV Episode 6 focusing on Formal Verification for the CORE-V CVE4
Be sure to register for the next episode of OpenHW TV next Thursday 19th November @ 11am EST / 8am PST / 4pm BST for a deep dive into Formal Verification for the CORE-V CVE4. As always, your questions are answered live by our experts which will include Sven Beyer at OneSpin, Ashish Darbari from Axiomise and Mike Thompson from OpenHW Group. Register now: https://bit.ly/38C7hku