CORE-V Chassis SoC to include CORE-V family of open-source RISC-V cores including a Linux capable 64-bit processor coupled with a 32-bit coprocessor.
Ottawa, Canada - December 9 2019: The OpenHW Group will be participating at the 2nd annual RISC-V Summit in San Jose, 10-12 December 2020.
Works through OpenHW Group to support design innovation and ensure ecosystem compatibility
CAMBRIDGE, UK – 6 December 2019
Interested in the work of the openMDM Working Group?