This episode of OpenHW TV will focus on the verification of the CORE-V-MCU currently under development by the OpenHW Group. Followers of OpenHW TV may recall that the CORE-V-MCU started out its life as the Arnold device (https://bit.ly/3PrfMCb) from the PULP-Platform team at ETH Zürich. Arnold has been successfully implemented in silicon, so a reasonable question is: “Why does the CORE-V-MCU need more verification?"
The answer to this question lies in the goals of the CORE-V-MCU which are to enable rapid deployment of hardware and software development kits and to accelerate the design of commercial SoC devices based on CV32E40P.
Enabling hardware and software dev-kits calls for an accelerated development cycle that puts an SoC (ASIC) implementation of CORE-V-MCU into developers hands as soon as possible. To support this goal, a verification project that employs processor-driven testing is being used. This has enabled rapid deployment of a set of simple C test-programs called “cli-test”, running under FreeRTOS.
To support developers of commercial grade SoC devices requires the same level of verification that has previously been deployed on the CV32E40P core. The CORE-V-MCU-VERIF project aims to deploy a complete UVM verification environment that is capable of fully verifying the MCU as well as future commercial SoC devices based on CV32E4 cores.
This presentation will be led by:
Mike Thompson, OpenHW Group Director of Engineering, Verification Task Group
Tim Saxe, CTO of QuickLogic
David Poulin, President of Datum Technologies
Mike will (briefly) re-introduce the CORE-V-MCU before handing the discussion over to Tim, who will summarize the goals of the first SoC device based on the CORE-V-MCU, and David, who will introduce a project to fully verify CORE-V-MCU with an "industrial grade" UVM verification environment.
Join the discussion here: https://us02web.zoom.us/webinar/register/WN_v1ppc_xtT3GAJfC9vZ_kfg