openhw
StarRISC: Rad-hard RISC-V for outerspace!
Join Dr Li Chen and Christopher Elash, from the University of Saskatchewan, to explore how their STARRLab team is taking RISC-V from the lab to orbit, with a fully taped-out, space-ready ASIC based on OpenHW Foundation’s CORE-V-MCU.
RISC-V in Space Workshop - OpenHW
This event brings together experts, engineers, and researchers to explore the latest innovations, applications, and challenges of RISC-V architecture in the space sector.
The event, organised by the European Space Agency and Frontgrade Gaisler in collaboration with RISC-V International, with the participation of the OpenHW Foundation, will take place on 2-3 April 2025 in Gothenburg, Sweden.
How to leverage/use Open Source RISC-V IP in Industry
RISC-V Europe 2024 Summit recap "How to leverage Open Source in Industry", by Jean-Roch Coulon, Thales (Thales Silicon Security).