RISC-V

RISC-V Global Forum

Together with members Imperas and Metrics, we are gold sponsors of the RISC-V Global Forum. Register for our presentation on Thursday September 3 at 1:20pm Pacific Time on "CORE-V Verification Test Bench – Commercial Quality Verification of Open-Source RISC-V Cores." This talk provides details of the CORE-V verification test bench, an open-source 'step & compare' System Verilog/UVM environment built by our ecosystem leveraging the Imperas RISC-V golden reference model and the Metrics Cloud-based EDA platform.

OpenHW TV Episode 1 now available on-demand

Monday, June 29, 2020 - 09:06 by Andrea Barnard
We live-streamed a world-class first episode of OpenHW TV on 18th June and even exceeded our registration numbers, as guest presenters from Metrics and Imperas highlighted the open source CORE-V processor IP design verification plan.
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<span>OpenHW TV Episode 1 now available on-demand</span>
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OpenHW Group announces OpenHW TV live online events

Friday, June 5, 2020 - 06:27 by Andrea Barnard

We’re excited to announce our latest initiative to help us amplify the value of open source processor IP – OpenHWTV. It’s a series of online events that look at the barriers to adoption of opensource IP and in each episode, we delve a little deeper into different areas with help from our 45+ members.

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<span>OpenHW Group announces OpenHW TV live online events</span>
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